Susan J. Eggers

Susan J. Eggers is an American computer scientist noted for her research on computer architecture and compilers.

"Eggers is best known for her foundational work in developing and helping to commercialize simultaneous multithreaded (SMT) processors, one of the most important advancements in computer architecture in the past 30 years. In the mid-1990s, Moore's Law was in full swing and, while computer engineers were finding ways to fit up to 1 billion transistors on a computer chip, the increase in logic and memory alone did not result in significant performance gains. Eggers was among those who argued that increasing parallelism, or a computer's ability to perform many calculations or processes concurrently, was the best way to realize performance gains." (IEEE Computer Society Eckert-Mauchly Award Announcement)

In 2006, Eggers was elected a member of the National Academy of Engineering for contributions to the design and evaluation of advanced processor architectures.

Biography Eggers received a B.A. in Economics from Connecticut College in 1965. She received a Ph.D in Computer Science from the University of California, Berkeley in 1989.

She then joined the Department of Computer Science at University of Washington in 1989 and is now an Emeritus Professor there.

Awards Eggers has several notable awards including: Computer architecture community's most prestigious award, the Eckert-Mauchly Award in 2018 for outstanding contribution to simultaneous multi thread processor architectures and multiprocessor sharing and coherency. Eggers is the first woman to win this award. ACM Fellow in 2002 "for contributions to the design and analysis of multithreaded and shared memory multiprocessors and compiler technology." IEEE Fellow in 2003 ACM-W Athena Lecturer Award in 2009 AAAS Fellow in 2006 She was elected a member of the National Academy of Engineering in 2006 She won 2011 and 2010 ISCA Influential Paper Awards for her 1996 and 1995 co-authored papers presented at the International Symposium on Computer Architecture.